Datasheet

14. A/D Converter
page 189
923fo7002,51.beF00.2.veR
0020-2020B90JER
)T62/C61M,B62/C61M,A62/C61M(puorGA62/C61M
A/D control register 0 (1)
Symbol Address After reset
ADCON0 03D6 16 00000XXX 2
b7 b6 b5 b4 b3 b2 b1 b0
Analog Input Pin
Select Bit (2, 3)
CH0
Bit symbol Bit name Function
CH1
CH2
A/D Operation Mode
Select Bit 0 (3)
MD0
MD
1
Trigger Select Bit
TRG
ADST
A/D Conversion Start
Flag
0 : A/D conversion disabled
1 : A/D conversion started
Frequency Select Bit 0CKS0
RW
A/D control register 1 (1)
Symbol Address After reset
ADCON1 03D7 16 00 16
Bit name FunctionBit symbol
b7 b6 b5 b4 b3 b2 b1 b0
A/D Sweep Pin
Select Bit
SCAN0
SCAN1
MD
2
BITS
8/10-Bit Mode Select Bit 0 : 8-bit mode
1 : 10-bit mode
VCUT
V
REF connect bit (2)
A/D Operation Mode
Select Bit 1
1 : V REF connected
0
0
0 1 : Repeat mode
b4 b3
1
Frequency Select Bit 1
CKS1
0 : Any mode other than repeat sweep
mode 1
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Refer to Table 14.2 A/D Conversion
Frequency Select
Refer to Table 14.2 A/D Conversion
Frequency Select
(b7-b6)
1
NOTE:
1. If the ADCON2 register is rewritten during A/D conversion, the conversion result will be indeterminate.
A/D control register 2 (1)
Symbol Address After reset
ADCON2 03D4 16 00 16
b7 b6 b5 b4 b3 b2 b1 b0
A/D Conversion Method
Select Bit
Bit symbol Bit name Function RW
SMP
Reserved Bit
Set to
“0”
0
A/D Input Group Select
Bit
0 0 : Select port P10 group (AN
i )
0 1 : Select port P9 group (AN
3i )
1 0 : Do not set
1 1 : Select port P9 group (AN
24 )
b2 b1
Frequency Select Bit 2
CKS2
ADGSEL0
ADGSEL1
RW
RW
RW
RW
RW
(b3)
Nothing is assigned. When write, set to “0”.
When read, its content is “0”.
(b7-b6)
See Table 14.2 A/D Conversion
Frequency Select
RW
TRG1
Trigger Select Bit 1
b2 b1 b0
0 0 0 : Select AN 0
0 0 1 : Select AN 1
0 1 0 : Select AN 2
0 1 1 : Select AN 3
1 0 0 : Select AN 4
1 0 1 : Select AN
5
1 1 0 : Select AN 6
1 1 1 : Select AN 7
0 : Software trigger
1 : Hardware trigger (AD
TRG trigger)
Invalid in repeat mode
Nothing is assigned. When write, set to “0”.
When read, its content is “0”.
0 : Without sample and hold
1 : With sample and hold
Set to "0" in repeat mode
0
NOTES:
1. If the ADCON1 register is rewritten during A/D conversion, the conversion result will be indeterminate.
2. If the VCUT bit is reset from “0” (V
REF unconnected) to “1” (V REF connected), wait for 1 µs or more before starting
A/D conversion.
NOTES:
1. If the ADCON0 register is rewritten during A/D conversion, the conversion result will be indeterminate.
2. AN
30 to AN 32 and AN 24 can be used in the same way as AN 0 to AN 7 . Use the ADGSEL1 to ADGSEL0 bits in the
ADCON2 register to select the desired pin.
3. After rewriting the MD1 to MD0 bits, set the CH2 to CH0 bits over again using an another instruction.
Figure 14.1.2.2 ADCON0 to ADCON2 Registers in Repeat Mode