Datasheet

13. Serial I/O
page 136
923fo7002,51.beF00.2.veR
0020-2020B90JER
)T62/C61M,B62/C61M,A62/C61M(puorGA62/C61M
Figure 13.1.4. U0TB to U2TB registers, U0RB to U2RB registers, U0BRG to U2BRG registers
(b15)
b7 b0
(b8)
b7
b0
UARTi Transmit Buffer Register (i=0 to 2)
(1)
Function
Transmit data
Nothing is assigned.
When write, set to "0". When read, its content is indeterminate.
Symbol Address After Reset
U0TB 03A3
16 -03A2 16 Indeterminate
U1TB 03AB
16 -03AA 16 Indeterminate
U2TB 037B
16 -037A 16 Indeterminate
RW
NOTES:
1. Use MOV instruction to write to this register.
WO
b7
UARTi Baud Rate Generation Register (i=0 to 2)
(1, 2, 3)
b0
Symbol Address After Reset
U0BRG 03A1
16 Indeterminate
U1BRG 03A9
16 Indeterminate
U2BRG 0379
16 Indeterminate
Function
Assuming that set value = n, UiBRG divides the count source
by n + 1
00
16 to FF 16
Setting Range
NOTES:
1. Write to this register while serial I/O is neither transmitting nor receiving.
2. Use MOV instruction to write to this register.
The transfer clock is shown below when the setting value in the UiBRG register is set as n.
(1) When the CKDIR bit in the UiMR register to “0” (internal clock)
• Clock synchronous serial I/O mode : fj/(2(n+1))
• Clock asynchronous serial I/O (UART) mode : fj/(16(n+1))
(2) When the CKDIR bit in the UiMR register to “1” (external clock)
• Clock synchronous serial I/O mode : f
EXT
• Clock asynchronous serial I/O (UART) mode : f EXT /(16(n+1))
fj : f1SIO, f2SIO, f8SIO, f32SIO
f
EXT : Input from CLKi pin
3. Set the UiBRG register after setting the CLK1 and CLK0 bits in the UiC0 registers.
RW
WO
NOTES:
1. When the SMD2 to SMD0 bits in the UiMR register are set to “000
2 ” (serial I/O disabled) or the RE bit in the UiC1 register is set to “0” (reception
disabled), all of the SUM, PER, FER and OER bits are set to “0” (no error). The SUM bit is set to “0” (no error) when all of the PER, FER and OER
bits are set to “0” (no error). Also, the PER and FER bits are set to “0” by reading the lower byte of the UiRB register.
2. The ABT bit is set to “0” by setting to “0” by program. (Writing “1” has no effect.)
Nothing is assigned at the bit 11 in the U0RB and U1RB registers. When write, set to "0". When read, its content is "0".
(b15)
Symbol Address After Reset
U0RB 03A7
16 -03A6 16 Indeterminate
U1RB 03AF 16 -03AE 16 Indeterminate
U2RB 037F
16 -037E 16 Indeterminate
b7 b0
(b8)
b7 b0
UARTi Receive Buffer Register (i=0 to 2)
Function
Bit Name
Bit
Symbol
0 : No framing error
1 : Framing error found
0 : No parity error
1 : Parity error found
0 : No error
1 : Error found
OER
FER
PER
SUM
Overrun error flag
(1)
Framing error flag
(1)
Parity error flag
(1)
Error sum flag
(1)
0 : No overrun error
1 : Overrun error found
Receive data (D
7 to D 0 )
ABT
Arbitration lost detecting
flag
(2)
0 : Not detected
1 : Detected
RW
RO
(b7-b0)
(b10-b9)
Receive data (D
8 )
(b8)
Nothing is assigned.
When write, set to "0". When read, its content is indeterminate.
RW
RO
RO
RO
RO
RO