Datasheet

12. Timer
page 124
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Figure 12.3.7. TB2 Register, TRGSR Register, and TABSR Register
TA1TGL
Symbol Address After reset
TRGSR 0383
16 00 16
Timer A1 event/trigger
select bit
To use the V-phase output control
circuit, set these bits to “01
2 ”(TB2
underflow).
Trigger select register
Bit name Function
Bit symbol
b0
To use the W-phase output control
circuit, set these bits to “01
2 ”(TB2
underflow).
0 0 :
Input on TA3 IN is selected (1)
0 1 :
TB2 overflow is selected (2)
1 0 :
TA2 overflow is selected (2)
1 1 :
TA4 overflow is selected (2)
To use the U-phase output control
circuit, set these bits to “01
2 ”(TB2
underflow).
Timer A2 event/trigger
select bit
Timer A3 event/trigger
select bit
Timer A4 event/trigger
select bit
RW
TA1TGH
TA2TGL
TA2TGH
TA3TGL
TA3TGH
TA4TGL
TA4TGH
b5 b4
b7 b6 b5 b4 b3 b2 b1
Symbol Address After reset
TABSR 0380
16 00 16
Count start flag
Bit name FunctionBit symbol
b7 b6 b5 b4 b3 b2 b1 b0
Timer B2 count start flag
Timer B1 count start flag
Timer B0 count start flag
Timer A4 count start flag
Timer A3 count start flag
Timer A2 count start flag
Timer A1 count start flag
Timer A0 count start flag
0 : Stops counting
1 : Starts counting
TB2S
TB1S
TB0S
TA4S
TA3S
TA2S
TA1S
TA0S
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
NOTES:
1. Set the corresponding port direction bit to “0” (input mode).
2. Overflow or underflow
Symbol Address After reset
TB2 0395
16 to 039416 Indeterminate
b7 b0 b7
b0
(b15) (
b8)
RW
000016 to FFFF16
Function
Setting rang
e
Timer B2 register
(1)
NOTE:
1. The register must be accessed in 16 bit units.
RW
Divide the count source by n + 1 where n = set value.
Timer A1, A2 and A4 are started at every occurrence of
underflow.