Datasheet
Table Of Contents
- Notes regarding these materials
- General Precautions in the Handling of MPU/MCU Products
- How to Use This Manual
- Table of Contents
- Quick Reference by Address B-
- 1. Overview
- 2. Central Processing Unit (CPU)
- 2.1 Data Registers (R0, R1, R2 and R3)
- 2.2 Address Registers (A0 and A1)
- 2.3 Frame Base Register (FB)
- 2.4 Interrupt Table Register (INTB)
- 2.5 Program Counter (PC)
- 2.6 User Stack Pointer (USP) and Interrupt Stack Pointer (ISP)
- 2.7 Static Base Register (SB)
- 2.8 Flag Register (FLG)
- 2.8.1 Carry Flag (C Flag)
- 2.8.2 Debug Flag (D Flag)
- 2.8.3 Zero Flag (Z Flag)
- 2.8.4 Sign Flag (S Flag)
- 2.8.5 Register Bank Select Flag (B Flag)
- 2.8.6 Overflow Flag (O Flag)
- 2.8.7 Interrupt Enable Flag (I Flag)
- 2.8.8 Stack Pointer Select Flag (U Flag)
- 2.8.9 Processor Interrupt Priority Level (IPL)
- 2.8.10 Reserved Area
- 3. Memory
- 4. Special Function Registers (SFRs)
- 5. Reset
- 6. Processor Mode
- 7. Clock Generation Circuit
- 8. Protection
- 9. Interrupt
- 10. Watchdog Timer
- 11. DMAC
- 12. Timer
- 13. Serial I/O
- 14. A/D Converter
- 15. CRC Calculation Circuit
- 16. Programmable I/O Ports
- 16.1 Port Pi Direction Register (PDi Register, i = 1, 6 to 10)
- 16.2 Port Pi Register (Pi Register, i = 1, 6 to 10)
- 16.3 Pull-up Control Register 0 to Pull-up Control Register 2 (PUR0 to PUR2 Registers)
- 16.4 Port Control Register
- 16.5 Pin Assignment Control register (PACR)
- 16.6 Digital Debounce function
- 17. Flash Memory Version
- 17.1 Flash Memory Performance
- 17.2 Memory Map
- 17.3 Functions To Prevent Flash Memory from Rewriting
- 17.4 CPU Rewrite Mode
- 17.5 Register Description
- 17.6 Precautions in CPU Rewrite Mode
- 17.6.1 Operation Speed
- 17.6.2 Prohibited Instructions
- 17.6.3 Interrupts
- 17.6.4 How to Access
- 17.6.5 Writing in the User ROM Space
- 17.6.6 DMA Transfer
- 17.6.7 Writing Command and Data
- 17.6.8 Wait Mode
- 17.6.9 Stop Mode
- 17.6.10 Low Power Consumption Mode and On-chip Oscillator-Low Power Consumption Mode
- 17.7 Software Commands
- 17.8 Status Register
- 17.9 Standard Serial I/O Mode
- 17.10 Parallel I/O Mode
- 18. Electrical Characteristics
- 19. Usage Notes
- 19.1 SFR
- 19.2 PLL Frequency Synthesizer
- 19.3 Power Control
- 19.4 Protect
- 19.5 Interrupts
- 19.6 DMAC
- 19.7 Timer
- 19.8 Serial I/O
- 19.9 A/D Converter
- 19.10 Programmable I/O Ports
- 19.11 Electric Characteristic Differences Between Mask ROM
- 19.12 Mask ROM Version
- 19.13 Flash Memory Version
- 19.13.1 Functions to Inhibit Rewriting Flash Memory
- 19.13.2 Stop mode
- 19.13.3 Wait mode
- 19.13.4 Low power dissipation mode, on-chip oscillator low power dissipation mode
- 19.13.5 Writing command and data
- 19.13.6 Program Command
- 19.13.7 Operation speed
- 19.13.8 Instructions prohibited in EW0 Mode
- 19.13.9 Interrupts
- 19.13.10 How to access
- 19.13.11 Writing in the user ROM area
- 19.13.12 DMA transfer
- 19.13.13 Regarding Programming/Erasure Times and Execution Time
- 19.13.14 Definition of Programming/Erasure Times
- 19.13.15 Flash Memory Version Electrical Characteristics 10,000 E/W cycle product
- 19.13.16 Boot Mode
- 19.14 Noise
- 19.15 Instruction for a Device Use
- Appendix 1. Package Dimensions
- Appendix 2. Functional Difference
- Register Index
- REVISION HISTORY

12. Timer
page 122
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0020-2020B90JER
)T62/C61M,B62/C61M,A62/C61M(puorGA62/C61M
Figure 12.3.5.
TA1, TA2, TA4, TA11, TA21 and TA41 Registers
Symbol Address After reset
TA1 0389
16-038816
TA2 038B
16-038A16 Indeterminate
TA4 038F
16-038E16 Indeterminate
TA11
(6,7)
034316-034216 Indeterminate
TA21
(6,7)
034516-034416 Indeterminate
TA41
(6,7)
034716-034616 Indeterminate
b7 b0 b7
b0
(b15) (
b8)
RW
Assuming the set value = n, upon a start trigger the timer
starts counting the count source and stops after counting
it n times. The positive and negative phases change at
the same time timer A, A2 or A4 stops.
Function
Setting range
Timer Ai, Ai-1 register (i=1, 2, 4)
(1, 2, 3, 4, 5)
WO
0000
16 to FFFF16
Indeterminate
NOTES:
1. The register must be accessed in 16 bit units.
2. When the timer Ai register is set to "0000
16", the counter does not operate and a timer Ai interrupt does not
occur.
3.Use MOV instruction to write to these registers.
4. If the INV15 bit is "0" (dead time timer enable), the positive or negative phase whichever is going from an
inactive to an active level changes at the same time the dead time timer stops.
5. If the INV11 bit is "0" (three-phase mode 0), the TAi register value is transferred to the reload register by a
timer Ai (i = 1, 2 or 4) start trigger. If the INV11 bit is "1" (three-phase mode 1), the TAi1 register value is
transferred to the reload register by a timer Ai start trigger first and then the TAi register value is transferred
to the reload register by the next timer Ai start trigger. Thereafter, the TAi1 register and TAi register values
are transferred to the reload register alternately.
6. Do not write to TAi1 registers synchronously with a timer B2 underflow In three-phase mode 1.
7. Write to the TAi1 register as follows:
(1) Write a value to the TAi1 register
(2) Wait for one cycle of timer Ai count source.
(3) Write the same value to the TAi1 register again.