Datasheet

12. Timer
page 115
923fo7002,51.beF00.2.veR
0020-2020B90JER
)T62/C61M,B62/C61M,A62/C61M(puorGA62/C61M
12.2.4 A/D Trigger Mode
A/D trigger mode is used as conversion start trigger for A/D converter in simultaneous sample sweep
mode of A/D conversion or delayed trigger mode 0. This mode is used as conversion start trigger of A/D
converter. A/D trigger mode is used in Timer B0 and Timer B1. In this mode, the timer starts counting by
one trigger until the count value becomes 000016. Figure 12.2.4.1 shows the TBiMR register in A/D
trigger mode and figure 12.2.4.2 shows the TB2SC register.
Item Specification
Count Source f1, f2, f8, f32, and fC32
Count Operation • Down count
• When the timer underflows, reload register contents are reloaded before
stopping counting
• When a trigger is generated during the count operation, the count is not
affected
Divide Ratio 1/(n+1) n: Setting value of TBi register (i=0,1)
000016-FFFF16
Count Start Condition When the TBiS (i=0,1) bit in the TABSR register is "1"(count started), TBiEN
(i=0,1) bit in TB2SC register is "1", and the following trigger is generated.
(Selection based on TB2SEL bit in the TB2SC register)
• Timer B2 overflow or underflow
• Underflow of Timer B2 interrupt generation frequency counter setting
Count Stop Condition • After the count value is 000016 and reload register contents are reloaded
• Set the TBiS bit to "0"(count stopped)
I nterrupt Request Timer underflows
(1)
Generation Timing
TBiIN Pin Function I/O port
Read From Timer Count value can be read by reading TBi register
Write To Timer
(2)
• When writing in the TBi register during count stopped.
Value is written to both reload register and counter
• When writing in the TBi register during count.
Value is written to only reload register (Transfered to counter when reloaded next)
NOTES:
1. A/D conversion is started by the timer underflow. For details refer to Section 14. A/D Converter.
2. When using in delayed trigger mode 0, set the larger value than the value of the timer B0 register
to the timer B1 register.
Table 12.2.4.1 A/D Trigger Mode Specifications