Datasheet

12. Timer
page 110
923fo7002,51.beF00.2.veR
0020-2020B90JER
)T62/C61M,B62/C61M,A62/C61M(puorGA62/C61M
Symbol Address After reset
TABSR 0380
16 0016
Count start flag
Bit name
Bit symbol
b7 b6 b5 b4 b3 b2 b1 b0
Timer B2 count start flag
Timer B1 count start flag
Timer B0 count start flag
Timer A4 count start flag
Timer A3 count start flag
Timer A2 count start flag
Timer A1 count start flag
Timer A0 count start flag
0 : Stops counting
1 : Starts counting
TB2S
TB1S
TB0S
TA4S
TA3S
TA2S
TA1S
TA0S
Function
Symbol Address After reset
TB0 0391
16
, 0390
16
Indeterminate
TB1 0393
16, 039216 Indeterminate
TB2 0395
16, 039416 Indeterminate
b7 b0 b7 b0
(b15)
(b8)
Timer Bi register (i=0 to 2)(1)
RW
Measures a pulse period or width
Function
RW
RW
RO
RW
RW
RW
RW
RW
RW
RW
RW
RW
Divide the count source by n + 1
where n = set value
Timer mode
Event counter
mode
0000
16 to FFFF16
Divide the count source by n + 1
where n = set value (2)
000016 to FFFF16
Pulse period
modulation mode,
Pulse width
modulation mode
Symbol Address After reset
CPSRF 0381
16 0XXXXXXX2
Clock prescaler reset flag
Bit name Function
Bit symbol
b7 b6 b5 b4 b3 b2 b1 b0
Clock prescaler reset flag
CPSR
Nothing is assigned. When write, set to “0”. When read, their
contents are indeterminate.
RW
RW
(b6-b0)
Setting this bit to “1” initializes the
prescaler for the timekeeping clock.
(When read, the value of this bit is “0”.
)
Mode
Setting range
A/D trigger
mode (3)
Divide the count source by n + 1 where
n = set value and cause the timer stop
RW
000016 to FFFF16
NOTES:
1. The register must be accessed in 16 bit units.
2. The timer counts pulses from an external device or overflows or underflows of other timers.
3. When this mode is used combining delayed trigger mode 0, set the larger value than the value of the timer
B0 register to the timer B1 register.
Figure 12.2.3. TB0 to TB2 Registers, TABSR Register, CPSRF Register