Datasheet

12. Timer
page 107
923fo7002,51.beF00.2.veR
0020-2020B90JER
)T62/C61M,B62/C61M,A62/C61M(puorGA62/C61M
Figure 12.1.4.2. Example of 16-bit Pulse Width Modulator Operation
Figure 12.1.4.3. Example of 8-bit Pulse Width Modulator Operation
1 / f i X (2 – 1)
16
Count source
Input signal to
TA
iIN pin
PWM pulse output
from TA
iOUT pin
Trigger is not generated by this signal
“H”
“H”
“L”
“L”
IR bit in the
TAiIC register
“1”
“0”
f j : Frequency of count source
(f
1 , f 2 , f 8 , f 32 , f C32 )
i = 0 to 4
1 / f
j X n
Set to “0” upon accepting an interrupt request or by writing in program
NOTES:
1. n = 0000
16 to FFFE 16 .
2. This timing diagram is for the case where the TAi register is set to "0003
16 ", the TAiTGH and TAiTGL bits in
the ONSF or TRGSR register is set to "00
2 " (TAi IN pin input), the MR1 bit in the TAiMR register is set to "1"
(rising edge), and the MR2 bit in the TAiMR register is set to "1" (trigger selected by TAiTGH and TAiTGL bits).
Count source
(1)
Input signal to
TA
iIN pin
Underflow signal of
8-bit prescaler
(2)
PWM pulse output
from TA
iOUT pin
“H”
“H”
“H”
“L”
“L”
“L”
“1”
“0”
Set to “0” upon accepting an interrupt request or by writing in program
1 / fj X (m + 1) X (2 – 1)
8
1 / fj X (m + 1) X n
1 / fj X (m + 1)
IR bit in the
TAiIC register
f
j : Frequency of count source
(f
1 , f 2 , f 8 , f 32 , f C32 )
i = 0 to 4
NOTES:
1. The 8-bit prescaler counts the count source.
2. The 8-bit pulse width modulator counts the 8-bit prescaler's underflow signal.
3. m = 00
16 to FF 16 ; n = 00 16 to FE 16 .
4. This timing diagram is for the case where the TAi register is set to "0202
16 ", the TAiTGH and TAiTGL bits in the
ONSF or TRGSR register is set to "00
2 " (TAi IN pin input), the MR1 bit in the TAiMR register is set to "0"(falling
edge), and the MR2 bit in the TAiMR register is set to "1" (trigger selected by TAiTGH and TAiTGL bits).