Datasheet

12. Timer
page 95
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0020-2020B90JER
)T62/C61M,B62/C61M,A62/C61M(puorGA62/C61M
Figure 12.1.3. TA0 to TA4 Registers, TABSR Register, and UDF Register
Symbol Address After reset
TA0 0387
16, 038616 Indeterminate
TA1 0389
16, 038816 Indeterminate
TA2 038B
16, 038A16 Indeterminate
TA3 038D
16, 038C16 Indeterminate
TA4 038F
16, 038E16 Indeterminate
b7 b0 b7 b0
(b15)
(b8)
Timer Ai register (i= 0 to 4) (1)
RW
Divide the count source by n + 1 where n =
set value
Function
Setting range
Divide the count source by FFFF
16 – n + 1
where n = set value when counting up or
by n + 1 when counting down
Divide the count source by n where n = set
value and cause the timer to stop
Modify the pulse width as follows:
PWM period: (2
16
– 1) / fj
High level PWM pulse width: n / fj
where n = set value, fj = count source
frequency
0000
16 to FFFE16
(3, 4)
00
16 to FE16
(High-order address)
00
16 to FF16
(Low-order address)
Timer A4 up/down flag
Timer A3 up/down flag
Timer A2 up/down flag
Timer A1 up/down flag
Timer A0 up/down flag
Timer A2 two-phase pulse
signal processing select bit
Timer A3 two-phase pulse
signal processing select bit
Timer A4 two-phase pulse
signal processing select bit
Symbol Address After reset
UDF 0384
16 0016
TA4P
TA3P
TA2P
Up/down flag (1)
Bit name FunctionBit symbol
b7 b6 b5 b4 b3 b2 b1 b0
TA4UD
TA3UD
TA2UD
TA1UD
TA0UD
0 : Down count
1 : Up count
Enabled by setting the TAiMR
register’s MR2 bit to “0”
(= switching source in UDF
register) during event counter
mode.
0 : two-phase pulse signal
processing disabled
1 : two-phase pulse signal
processing enabled
Symbol Address After reset
TABSR 0380
16 0016
Count start flag
Bit name FunctionBit symbol RW
b7 b6 b5 b4 b3 b2 b1 b0
Timer B2 count start flag
Timer B1 count start flag
Timer B0 count start flag
Timer A4 count start flag
Timer A3 count start flag
Timer A2 count start flag
Timer A1 count start flag
Timer A0 count start flag
0 : Stops counting
1 : Starts counting
TB2S
TB1S
TB0S
TA4S
TA3S
TA2S
TA1S
TA0S
RW
RW
WO
WO
WO
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
WO
WO
WO
Timer
mode
Event
counter
mode
One-shot
timer mode
Pulse width
modulation
mode
(16-bit PWM)
Pulse width
modulation
mode
(8-bit PWM)
000016 to FFFF16
000016 to FFFF16
000016 to FFFF16
(2, 4)
Mode
Modify the pulse width as follows:
PWM period: (2
8
– 1) x (m + 1)/ fj
High level PWM pulse width: (m + 1)n / fj
where n = high-order address set value,
m = low-order address set value, fj =
count source frequency
(3, 4)
(2, 3)
(5)
NOTES:
1. The register must be accessed in 16 bit units.
2.: If the TAi register is set to ‘0000
16,’ the counter does not work and timer Ai interrupt requests are
not generated either. Furthermore, if “pulse output” is selected, no pulses are output from the
TAiOUT pin.
3. If the TAi register is set to ‘0000
16,’ the pulse width modulator does not work, the output level on
the TAiOUT pin remains low, and timer Ai interrupt requests are not generated either. The same
applies when the 8 high-order bits of the timer TAi register are set to ‘00
16’ while operating as an
8-bit pulse width modulator.
4. Use the MOV instruction to write to the TAi register.
5. The timer counts pulses from an external device or overflows or underflows in other timers.
NOTES:
1. Use MOV instruction to write to this register.
2. Make sure the port direction bits for the TA2
IN to TA4IN and TA2OUT to TA4OUT pins are set to “0”
(
in
p
ut mode
)
.