Datasheet

857
Din
Standby
SLEEP
Bus right release
PDn/
Dn
PDW
RES
R
QD
C
PDnDR
PDR
Dn
Dout
Single
mode
MCU mode 1
MCU mode 0
MCU mode 2
PFC
Q HIZ
QPDnMD
QPDnIOR
Internal
data bus
n = 8–15
PDR: Port D read signal
PDW: Port D write signal
RES: Reset signal
Dout: Data output timing signal
Din: Data bus input timing signal
SBYCR

Figure B.32 PDn/Dn Block Diagram