Datasheet

849
PDR
PROM mode
Internal
data bus
RES
Single mode
MCU mode 0
MCU mode 1
MCU mode 2
Dn
Dout
PFC
SBYCR
Din
Standby
Bus right release
SLEEP
PDW
n = 0–7
PDR: Port D read signal
PDW: Port D write signal
RES: Reset signal
Dout: Data output timing signal
Din: Data bus input timing signal
PDnDR
Q
C
D
R
On-chip
*
EPROM
Dn
Q PDnMD
Q PDnIOR
Q HIZ
PDn/
Dn
Note: * Not available with the mask version.
Figure B.24 PDn/Dn Block Diagram