838
PAR
Internal
data bus
RES
Single mode
PFC
SBYCR
Standby
Bus right
release
PAW
PAR: Port A read signal
PAW: Port A write signal
RES: Reset signal
PAnDR
Q
C
D
R
Q PA17MD
Q HIZ
WAIT
request
Q PA17IOR
PA17/
WAIT
Figure B.13 PA17/WAIT Block Diagram
