837
PAR
Internal
data bus
RES
AH, CASHL,
CASHH,WRHL,
WRHH
Single mode
PFC
SBYCR
Standby
Bus right
release
PAW
n = 16,20-23
PAR: Port A read signal
PAW: Port A write signal
RES: Reset signal
PAnDR
Q
C
D
R
Q PAnMD
Q HIZ
Q PAnIOR
PAn/
XXXX
Figure B.12 PAn/XXXX Block Diagram
