Datasheet

831
Q PAnMD0
Q PAnMD1
PAR
RES
PAW
C
D
Q
PAnDR
PFC
SBYCR
OE, CE
Q HIZ
MTU
TCLKC,D
INTC
IRQ2,IRQ3
Q PAnIOR
PA8/TCLKC/IRQ2 PA9/TCLKD/IRQ3
n=8, 9
PAR: Port A read signal
PAW: Port A write signal
RES: Reset signal

On-chip flash memory
Writer mode
Internal data bus
Standby
Figure B.6 PAn/TCLKm/IRQx Block Diagram (F-ZTAT Version)