829
Q PA7MD0
Q PA7MD1
PAR
RES
PAW
C
D
Q
PA7DR
PFC
SBYCR
WE
Q HIZ
MTU
TCLKB
CS3
Q PA7IOR
PA7/TCLKB/CS3
PAR: Port A read signal
PAW: Port A write signal
RES: Reset signal
On-chip flash memory
Writer mode
Internal data bus
Standby
Figure B.4 PA7/TCLKB/CS3 Block Diagram (F-ZTAT Version)
