827
PAR
Internal
data bus
RES
SCKmOUT
PFC
Standby
PAW
PAnDR
Q
C
D
SBYCR
INTC
IRQm
n = 2, 5
m = 0, 1
PAR: Port A read signal
PAW: Port A write signal
RES: Reset signal
DMAC
DREQm
SCI
SCKmIN
Q PAnMD0
Q PAnIOR
Q HIZ
Q PAnMD1
PAn/
SCKm/
DREQm/
IRQm
Figure B.2 PAn/SCKm/DREQm/IRQm Block Diagram
