760
CK
A21–A0
DACKn
T1 Tw T2
t
AD
t
CSD1
t
RSD1
t
WSD1
t
WDD
t
DACKD1
t
RSD2
t
CSD2
t
RDS
t
RDH
t
WSD2
t
WDH
t
DACKD1
t
OE
t
ACC
t
AS
t
WRH
t
WR
Note: t
RDH
is specified from fastest negate timing of A21–A0, CSn, and RD.
CSn
RD
D31–D0
D31–D0
(During read)
(During read)
(During write)
(During write)
WRxx
Figure 25.9 Basic Cycle (Software Waits)
