Datasheet

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• Bit 0—PC0 Mode (PC0MD): Selects the function of the PC0/A0 pin.
Bit 0: PC0MD Description
0 General input/output (PC0) (initial value) (A0 in on-chip ROM invalid mode)
1 Address output (A0) (PC0 in single chip mode)
18.3.9 Port D I/O Register H (PDIORH)
The port D I/O register H (PDIORH) is a 16-bit read/write register that selects input or output for
the most significant sixteen port D pins. Bits PD31IOR–PD16IOR correspond to the
PD31/D31/ADTRG pin to PD16/D16/IRQ0 pin. PDIORH is enabled when the port D pins
function as general input/outputs (PD31–PD16). For other functions, it is disabled.
For port D pin functions PD31–PD16, a given pin in port D is an output pin if its corresponding
PDIORH bit is set to 1, and an input pin if the bit is cleared to 0.
PDIORH is initialized to H'0000 by external power-on reset; however, it is not initialized for
manual resets, reset by WDT, standby mode, or sleep mode, so the previous data is maintained.
The settings for this register are effective only for the 144-pin version. There are no corresponding
pins for this register in the 112-pin and 120-pin versions. However, read/writes are possible.
Bit: 15 14 13 12 11 10 9 8
PD31
IOR
PD30
IOR
PD29
IOR
PD28
IOR
PD27
IOR
PD26
IOR
PD25
IOR
PD24
IOR
Initial value: 0 0 0 0 0 0 0 0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 7 6 5 4 3 2 1 0
PD23
IOR
PD22
IOR
PD21
IOR
PD20
IOR
PD19
IOR
PD18
IOR
PD17
IOR
PD16
IOR
Initial value: 0 0 0 0 0 0 0 0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W