Datasheet

611
• Bit 8—PA20 Mode (PA20MD): Selects the function of the PA20/CASHL pin.
Bit 8: PA20MD Description
0 General input/output (PA20) (initial value)
1 Column address output (CASHL) (PA20 in single chip mode)
• Bits 7 and 6—PA19 Mode 1, 0 (PA19MD1 and PA19MD0): These bits select the function of
the PA19/BACK/DRAK1 pin.
Bit 7:
PA19MD1
Bit 6:
PA19MD0 Description
0 0 General input/output (PA19) (initial value)
1 Bus right request acknowledge (BACK) (PA19 in single chip
mode)
1 0 DREQ1 request received output (DRAK1) (PA19 in single
chip mode)
1 Reserved
• Bits 5 and 4—PA18 Mode 1, 0 (PA18MD1 and PA18MD0): These bits select the function of
the PA18/BREQ/DRAK0 pin.
Bit 5:
PA18MD1
Bit 4:
PA18MD0 Description
0 0 General input/output (PA18) (initial value)
1 Bus right request input (BREQ) (PA18 in single chip mode)
1 0 DREQ0 request received output (DRAK0) (PA18 in single
chip mode)
1 Reserved
• Bit 3—Reserved: This bit always reads as 0. The write value should always be 0.
• Bit 2—PA17 Mode (PA17MD): Selects the function of the PA17/WAIT pin.
Bit 2: PA17MD Description
0 General input/output (PA17) (initial value)
1 Wait state request input (WAIT) (PA17 in single chip mode)
• Bit 1—Reserved: This bit always reads as 0. The write value should always be 0.