Datasheet

599
Section 18 Pin Function Controller
18.1 Overview
The pin function controller (PFC) is composed of registers for selecting the function of
multiplexed pins and the direction of input/output. Table 18.1 lists the SH7040 Series’s
multiplexed pins. The multiplex pin functions have restrictions dependent on the operating mode.
Table 18.2 lists the pin functions and initial values for each operating mode.
Table 18.1 Multiplexed Pins
Port
Function 1
(Related Module)
Function 2
(Related Module)
Function 3
(Related Module)
Function 4
(Related Module)
FP-
112
FP-
144
TFP-
120
A PA23 I/O (port) WRHH output (BSC) — — — 1 —
PA22 I/O (port) WRHL output (BSC) — — — 3 —
PA21 I/O (port) CASHH output (BSC) — — — 4 —
PA20 I/O (port) CASHL output (BSC) — — — 29 —
PA19 I/O (port) BACK output (BSC) DRAK1 output
(DMAC)
— — 30 —
PA18 I/O (port) BREQ input (BSC) DRAK0 output
(DMAC)
— — 33 —
PA17 /O (port) WAIT input (BSC) — — — 101 —
PA16 I/O (port) AH output (BSC) — — — 100 —
PA15 I/O (port) CK output (CPG) — — 83 107 88
PA14 I/O (port) RD output (BSC) — — 34 43 37
PA13 I/O (port) WRH output (BSC) — — 36 47 39
PA12 I/O (port) WRL output (BSC) — — 38 48 41
PA11 I/O (port) CS1 output (BSC) — — 40 49 43
PA10 I/O (port) CS0 output (BSC) — — 41 50 44
PA9 I/O (port) TCLKD input (MTU) IRQ3 (INTC) — 42 51 45
PA8 I/O (port) TCLKC input (MTU) IRQ2 (INTC) — 43 52 46
PA7 I/O (port) TCLKB input (MTU) CS3 output (BSC) — 44 53 47
PA6 I/O (port) TCLKA input (MTU) CS2 output (BSC) — 45 54 48
PA5 I/O (port) SCK1 I/O (SCI) DREQ1 input
(DMAC)
IRQ1 input (INTC) 46 136 49