Datasheet
596
17.5 Notes on Use
Take care that the contentions described in sections 17.5.1–17.5.3 do not arise during CMT
operation.
17.5.1 Contention between CMCNT Write and Compare Match
If a compare match signal is generated during the T
2
state of the CMCNT counter write cycle, the
CMCNT counter clear has priority, so the write to the CMCNT counter is not performed. Figure
17.6 shows the timing.
T
1
T
2
CK
Address
Internal
write signal
Compare
match signal
CMCNT
CMCNT write cycle
CMCNT
N H'0000
Figure 17.6 CMCNT Write and Compare Match Contention