Datasheet
4
• 16 independent comparators
• 8 types of counter input clock
• Input capture function
• Pulse output mode
One shot, toggle, PWM, phase-compensated PWM, reset-synchronized PWM
• Multiple counter synchronization function
• Phase-compensated PWM output mode
Non-overlapping waveform output for 6-phase inverter control
Automatic setting for dead time
PWM duty cycle can be set from 0 to 100%
Output off function
• Reset-synchronized PWM mode
3-phase output of any duty cycle positive phase/reverse phase PWM waveforms
• Phase calculation mode
2-phase encoder calculation processing
Compare Match Timer (CMT) (Two Channels):
• 16-bit free-running counter
• One compare register
• Generates an interrupt request upon compare match
Watchdog Timer (WDT) (One Channel):
• Watchdog timer or interval timer
• Count overflow can generate an internal reset, external signal, or interrupt
Serial Communication Interface (SCI) (Two Channels):
(Per Channel):
• Asynchronous or clock-synchronous mode is selectable
• Can transmit and receive simultaneously (full duplex)
• On-chip dedicated baud rate generator
• Multiprocessor communication function
I/O Ports:
• QFP 112 (SH7040, SH7042, SH7044), TQFP-120 (SH7040, SH7042)
Input/output: 74
Input: 8