Datasheet
394
12.7.6 Contention between TGR Read and Input Capture
If an input capture signal is issued in the T
1
state of the TGR read cycle, the read data is that after
input capture transfer (figure 12.81).
TGR
Input capture
signal
Internal data
bus
Address
Read signal
φ
T
1
T
2
TGR read cycle
TGR
address
M
XM
Figure 12.81 TGR Read and Input Capture Contention