Datasheet

382
TCNT
input clock
TIOC pin
Compare-
match signal
TCNT
TGR
φ
N
N
N + 1
Figure 12.63 Output Compare Output Timing (Complementary PWM Mode/Reset Sync
PWM Mode)
Input Capture Signal Timing: Figure 12.64 illustrates input capture timing.
Input capture
input
Input capture
signal
TCNT
TGR
φ
N N + 2
N N + 2
N + 1
Rising edge Falling edge
Figure 12.64 Input Capture Input Signal Timing