Datasheet

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12.4.4 Buffer Operation
Buffer operation is a function of channels 0, 3, and 4. TGRC and TGRD can be used as buffer
registers. Table 12.5 shows the register combinations for buffer operation.
Table 12.5 Register Combinations
Channel General Register Buffer Register
0 TGR0A TGR0C
TGR0B TGR0D
3 TGR3A TGR3C
TGR3B TGR3D
4 TGR4A TGR4C
TGR4B TGR4D
The buffer operation differs, depending on whether the TGR has been set as an input capture
register or an output compare register.
When TGR Is an Output Compare Register: When a compare-match occurs, the corresponding
channel buffer register value is transferred to the general register. Figure 12.17 shows an example.
Compare match signal
Buffer
register
TCNT
Comparator
General
register
Figure 12.17 Compare Match Buffer Operation
When TGR Is an Input Capture Register: When an input capture occurs, the timer counter
(TCNT) value is transferred to the general register (TGR), and the value that had been held up to
that time in the TGR is transferred to the buffer register (figure 12.18).
Input capture signal

TCNT
Buffer
register
General
register
Figure 12.18 Input Capture Buffer Operation