Datasheet

302

• Bits 3–0—I/O Control C3–C0 (IOC3–IOC0): These bits set the TGR4C register function.

Bit 3:

IOC3

Bit 2:

IOC2

Bit 1:

IOC1

Bit 0:

IOC0 Description

0 0 0 0 TGR3C Output disabled (initial value)

1 is an Initial Output 0 on compare-match

1 0 output output Output 1 on compare-match

1 compare is 0 Toggle output on compare-match

1 0 0 register Output disabled

1 Initial Output 0 on compare-match

1 0 output Output 1 on compare-match

1 is 1 Toggle output on compare-match

1 0 0 0 TGR3C Capture Input capture on rising edge

1 is an input source Input capture on falling edge

1 0 input is the Input capture on both edges

1 capture TIOC3C pin

1 0 0 register Input capture on rising edge

1 Input capture on falling edge

1 0 Input capture on both edges

Note: When the BFA bit of TMDR3 is set to 1 and TGR3C is being used as a buffer register, these

settings become ineffective and input capture/output compares do not occur.