Datasheet

278
12.1.3 Pin Configuration
Table 12.2 summarizes the MTU pins.
Table 12.2 Pin Configuration
Channel Name Pin Name I/O Function
Shared Clock input A TCLKA I Clock A input pin (A-phase input pin in channel 1
phase counting mode)
Clock input B TCLKB I Clock B input pin (B-phase input pin in channel 1
phase counting mode)
Clock input C TCLKC I Clock C input pin (A-phase input pin in channel 2
phase counting mode)
Clock input D TCLKD I Clock D input pin (B-phase input pin in channel 2
phase counting mode)
0 Input
capture/output
compare-match 0A
TIOC0A I/O TGR0A input capture input/output compare
output/PWM output pin
Input
capture/output
compare-match 0B
TIOC0B I/O TGR0B input capture input/output compare
output/PWM output pin
Input
capture/output
compare-match 0C
TIOC0C I/O TGR0C input capture input/output compare
output/PWM output pin
Input
capture/output
compare-match 0D
TIOC0D I/O TGR0D input capture input/output compare
output/PWM output pin
1 Input
capture/output
compare-match 1A
TIOC1A I/O TGR1A input capture input/output compare
output/PWM output pin
Input
capture/output
compare-match 1B
TIOC1B I/O TGR1B input capture input/output compare
output/PWM output pin
2 Input
capture/output
compare-match 2A
TIOC2A I/O TGR2A input capture input/output compare
output/PWM output pin
Input
capture/output
compare-match 2B
TIOC2B I/O TGR2B input capture input/output compare
output/PWM output pin