Datasheet

275
Table 12.1 summarizes the MTU functions.
Table 12.1 MTU Functions
Item Channel 0 Channel 1 Channel 2 Channel 3 Channel 4
Counter clocks Internal: φ/1, φ/4, φ/16, φ/64, φ/256, φ/1024
External: Eight to each channel from TCLKA, TCLKB, TCLKC, and TCLKD
General registers TGR0A
TGR0B
TGR1A
TGR1B
TGR2A
TGR2B
TGR3A
TGR3B
TGR4A
TGR4B
General
registers/buffer
registers
TGR0C
TGR0D
No No TGR3C
TGR3D
TGR4C
TGR4D
Input/output pins TIOC0A
TIOC0B
TIOC0C
TIOC0D
TIOC1A
TIOC1B
TIOC2A
TIOC2B
TIOC3A
TIOC3B
TIOC3C
TIOC3D
TIOC4A
TIOC4B
TIOC4C
TIOC4D
Counter clear
function
TGR compare-
match or input
capture
TGR compare-
match or input
capture
TGR compare-
match or input
capture
TGR compare-
match or input
capture
TGR compare-
match or input
capture
Compare 0 Yes Yes Yes Yes Yes
match output 1 Yes Yes Yes Yes Yes
Toggle Yes Yes Yes Yes Yes
Input capture
function
Yes Yes Yes Yes Yes
Synchronization Yes Yes Yes Yes Yes
Buffer operation Yes No No Yes No
PWM mode 1 Yes Yes Yes Yes Yes
PWM mode 2 Yes Yes Yes No No
Phase counting
mode
No Yes Yes No No
Reset-synchronized
PWM mode
No No No Yes Yes
Complementary
PWM mode
No No No Yes Yes
DMAC activation TGR0A com-
pare match or
input capture
TGR1A com-
pare match or
input capture
TGR2A com-
pare match or
input capture
TGR3A com-
pare match or
input capture
TGR4A com-
pare match or
input capture