Datasheet

254
CK
DREQ
DRAK
Bus
cycle
DACK
CPU
CPU CPUCPU
DMAC(R)
DMAC(W) DMAC(R)DMAC(R)
DMAC(W)DMAC(R)
DMAC(W)
Figure 11.19 Burst Mode, Dual Address, and Level Detection (Fastest Operation)