Datasheet

224
• Bits 11–8—Resource Select 3–0 (RS3–RS0): These bits specify the transfer request source.
Bit 11:
RS3
Bit 10:
RS2
Bit 9:
RS1
Bit 8:
RS0 Description
0 0 0 0 External request, dual address mode (initial value)
0 0 0 1 Prohibited
0 0 1 0 External request, single address mode. External address
space → external device.
0 0 1 1 External request, single address mode. External device →
external address space.
0 1 0 0 Auto-request
0 1 0 1 Prohibited
0 1 1 0 MTU TGI0A
0 1 1 1 MTU TGI1A
1 0 0 0 MTU TGI2A
1 0 0 1 MTU TGI3A
1 0 1 0 MTU TGI4A
1 0 1 1 A/D ADI
*
1 1 0 0 SCI0 TXI0
1 1 0 1 SCI0 RXI0
1 1 1 0 SCI1 TXI1
1 1 1 1 SCI1 RXI1
Notes: External request designations are valid only for channels 0 and 1. No transfer request
sources can be set for channels 2 or 3.
* ADI1 for A mask.
• Bit 7—Reserved bits: Data is 0 when read. The write value always be 0.
• Bit 6—DREQ Select (DS): Sets the sampling method for the DREQ pin in external request
mode to either low-level detection or falling-edge detection. This bit is valid only with CHCR0
and CHCR1. For CHCR2 and CHCR3, this bit always reads as 0 and cannot be modified.
Even with channels 0 and 1, when specifying an on-chip peripheral module or auto-request as
the transfer request source, this bit setting is ignored. The sampling method is fixed at falling-
edge detection in cases other than auto-request.
Bit 6: DS Description
0 Low-level detection (initial value)
1 Falling-edge detection