Datasheet

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11.2.3 DMA Transfer Count Registers 0–3 (DMATCR0–DMATCR3)
DMA transfer count registers 0–3 (DMATCR0–DMATCR3) are 24-bit read/write registers that
specify the transfer count for the channel (byte count, word count, or longword count). Specifying
a H'000001 gives a transfer count of 1, while H'000000 gives the maximum setting, 16,777,216
transfers. The data for the upper 8 bits of a DMATCR is 0 when read. Always write 0. The initial
value after power-on resets or in software standby mode is undefined. These registers are not
initialized with manual reset.
Always write 0 to the upper 8 bits of a DMATCR.
Bit: 31 30 29 28 27 26 25 24
————————
Initial value: — — — — — — — —
R/W: R R R R R R R R
Bit: 23 22 21 20 19 18 17 16
Initial value: — — — — — — — —
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 15 14 13 12 11 10 9 8
Initial value: — — — — — — — —
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 7 6 5 4 3 2 1 0
Initial value: — — — — — — — —
R/W: R/W R/W R/W R/W R/W R/W R/W R/W