Datasheet

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11.1.4 Register Configuration
Table 11.2 summarizes the DMAC registers. DMAC has a total of 17 registers. Each channel has
four control registers. One other control register is shared by all channels
Table 11.2 DMAC Registers
Chan-
nel Name
Abbrevi-
ation R/W
Initial
Value Address
Register
Size
Access
Size
0 DMA source address
register 0
SAR0 R/W Undefined H'FFFF86C0 32 bit 16, 32
*
2
DMA destination
address register 0
DAR0 R/W Undefined H'FFFF86C4 32 bit 16, 32
*
2
DMA transfer count
register 0
DMATCR0 R/W Undefined H'FFFF86C8 32 bit 16, 32
*
3
DMA channel control
register 0
CHCR0 R/W
*
1
H'00000000 H'FFFF86CC 32 bit 16, 32
*
2
1 DMA source address
register 1
SAR1 R/W Undefined H'FFFF86D0 32 bit 16, 32
*
2
DMA destination
address register 1
DAR1 R/W Undefined H'FFFF86D4 32 bit 16, 32
*
2
DMA transfer count
register 1
DMATCR1 R/W Undefined H'FFFF86D8 32 bit 16, 32
*
3
DMA channel control
register 1
CHCR1 R/W
*
1
H'00000000 H'FFFF86DC 32 bit 16, 32
*
2
2 DMA source address
register 2
SAR2 R/W Undefined H'FFFF86E0 32 bit 16, 32
*
2
DMA destination
address register 2
DAR2 R/W Undefined H'FFFF86E4 32 bit 16, 32
*
2