Datasheet

207
SH704x
128k × 8 bits
SRAM
CSn
RD
CS
OE
A0
A1–A17 A0–A16
WRH WE
D8–D15
I/O0–I/O7
WRL
D0–D7
CS
OE
A0–A16
WE
I/O0–I/O7
Figure 10.27 16-Bit Data Bus Width SRAM Connection