206
SH704x
CSn
RD
CE
CE
OE
OE
A0
A1
A2–A19
D16–D31
D0–D15
A0–A17
A0–A17
I/O0–I/O15
I/O0–I/O15
256k × 16 bits
ROM
Figure 10.25 32-Bit Data Bus Width ROM Connection
SH704x
CSn
RD
WRL WE
CS
OE
A0–A16 A0–A16
D0–D7 I/O0–I/O7
123k × 8 bits
SRAM
Figure 10.26 8-Bit Data Bus Width SRAM Connection
