Datasheet

Section Page Description
Appendix C Pin
States
Table C.2 Pin
Modes During Reset,
Power-Down, and
Bus Right Release
Modes (112 Pin,
120 Pin)
867
Table amended
Pin modes
Pin Function Reset Power-Down
Bus Right Standby in Bus
Class Pin Name Power-On Manual Standby Sleep Release Right Release
Clock CK O O H
*
1
OO O
System RES IIIII I
control
MRES Z
*
4
IZII Z
WDTOVF O
*
3
O
*
3
OOO O
BREQ Z
*
4
IZII I
BACK Z
*
4
OZOL L
Interrupt NMI I I I I I I
IRQ0IRQ7 Z
*
4
IZII Z
IRQOUT Z
*
4
OZHO Z
Address
bus
A0A21 O
*
2
OZOZ Z
Data bus D0D31 Z
*
4
I/O Z I/O Z Z
Bus WAIT Z
*
4
IZIZ Z
control
RDWR, RAS Z
*
4
OOOZ Z
CASH, CASL Z
*
4
OOOZ Z
RD HOZOZ Z
CS0, CS1 HOZOZ Z
CS2, CS3 Z
*
4
OZOZ Z
WRH, WRL HOZOZ Z
AH Z
*
4
OZOZ Z
DMAC DACK0DACK1 Z
*
4
OZOO Z
DRAK0DRAK1 Z
*
4
OZOO Z
DREQ0DREQ1 Z
*
4
IZII Z
MTU TIOC0ATIOC0D,
TIOC1ATIOC1D,
TIOC2ATIOC2D,
TIOC3A, TIOC3C
Z
*
4
I/O K
*
1
I/O I/O K
*
1
TIOC3B,TIOC3D,
TIOC4ATIOC4D
Z
*
4
I/O Z I/O I/O Z
TCLKATCLKD Z
*
4
IZII Z