Datasheet

168
Table 10.3 Address Map for On-Chip ROM Effective Mode
Address Space Memory Size Bus Width
H'00000000–H'0003FFFF
*
1
On-chip ROM On-chip ROM memory 256 kbytes 32 bits
H'00040000–H'001FFFFF Reserved Reserved
H'00200000–H'003FFFFF CS0 space Ordinary space 2 Mbytes 8/16/32 bits
*
2
H'00400000–H'007FFFFF CS1 space Ordinary space 4 Mbytes 8/16/32 bits
*
2
H'00800000–H'00BFFFFF CS2 space Ordinary space 4 Mbytes 8/16/32 bits
*
2
H'00C00000–H'00FFFFFF CS3 space Ordinary space or
multiplex I/O space
4 Mbytes 8/16/32 bits
*
3
H'01000000–H'01FFFFFF DRAM space DRAM 16 Mbytes 8/16/32 bits
*
2
H'02000000–H'FFFF7FFF Reserved Reserved
H'FFFF8000–H'FFFF87FF On-chip
peripheral
module
On-chip peripheral
module
2 kbytes 8/16 bits
H'FFFF8800–H'FFFFEFFF Reserved Reserved
H'FFFFF000–H'FFFFFFFF On-chip RAM On-chip RAM 4 kbytes 32 bits
Notes: Do not access reserved spaces. Operation cannot be guaranteed if they are accessed.
*1 With the 64-kbyte version of on-chip ROM, the ROM address is H'0000000–
H'0000FFFF, and address H'00010000–H'0003FFFF is reserved space.
With the 128-kbyte version of on-chip ROM, the ROM address is H'00000000–
H'0001FFFF, and address H'00020000–H'0003FFFF is reserved space.
*2 Selected by on-chip register settings.
*3 Ordinary space: selected by on-chip register settings.
Multiplex I/O space: 8/16 bit selected by the A14 bit.