Datasheet
161
Miss-hit
CK
Internal
address
Address
CSn
RD
Data
Idle cycle
Idle cycle
Idle cycle
CS assert extension
Figure 9.5 Cache Fill Timing in Case of Non-Consecutive Cache Miss from Normal Space
(No Wait, No CS Assert Extension)
Miss-hit
CK
Internal
address
Address
CSn
RD
Data
CS assert additional extension
Figure 9.6 Cache Fill Timing in Case of Consecutive Cache Misses from Normal Space
(No Wait, CS Assert Extension)