Datasheet

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Section 8 Data Transfer Controller (DTC)
8.1 Overview
The SH7040 Series has an on-chip data transfer controller (DTC), which is activated either by
interrupts or software and can perform data transfers.
8.1.1 Features
• Arbitrary channel number transfer setting possible
 Transfer information can be established for each interrupt source
 Transfer information stored in memory
 Multiple data transfers possible (chain transfers) for one activating source
• Address space: 32-bit addresses can be designated for both transfer source and destination
• Transfer devices
 Memory: On-chip ROM, on-chip RAM, external ROM, external RAM
 On-chip peripheral modules (excluding DMAC/DTC)
 Memory-mapped external devices
• Abundant transfer modes
 Can select between normal mode/repeat mode/block transfer mode
 Can select between increment/decrement/fixed for source/destination address
• Transfer units can be set as byte/word/longword
• Interrupts activating the DTC can be requested of the CPU
 Interrupt requests can be generated to the CPU after completion of a data transfer
 Interrupt requests generated to the CPU after completion of all designated data transfers
• Transfers can be activated by software