Datasheet

Section Page Description
12.9.2 Block
Diagram
Figure 12.125 POE
Block Diagram
444
Note added
TIOC3B
*
TIOC3D
*
TIOC4A
*
TIOC4C
*
TIOC4B
*
TIOC4D
*
Note: * Includes multiplexed pins.
12.11.5 Usage
Notes
453
Section added
14.2.8 Bit Rate
Register (BRR)
Table 14.3 Bit Rates
and BRR Settings in
Asynchronous Mode
(cont)
491
Table amended
Bit Rate
27.0336
(Bits/s) n N Error (%)
110 3 119 0.00
150 3 87 0.00
300 2 175 0.00
600 1 87 0.00
1200 1 175 0.00
2400 1 87 0.00
4800 0 175 0.00
9600 0 87 0.00
14400 0 58 0.56
19200 0 43 0.00
28800 0 28 1.15
31250 0 26 0.12
38400 0 21 0.00
Table 14.4 Bit Rates
and BRR Settings in
Clocked
Synchronous Mode
(cont)
495 Table amended
3.5M —— 01
5M 0 0
*
—— ——
7M —— 00
*
14.3.4 Clock
Synchronous
Operation
Figure 14.22
Example of SCI
Receive Operation
529
Figure amended
Bit 7 Bit 0
RxI request