Datasheet
69
Table 2.15 Shift Instructions
Instruction Instruction Code Operation
Execu-
tion
Cycles T Bit
ROTL Rn 0100nnnn00000100 T ← Rn ← MSB 1 MSB
ROTR Rn 0100nnnn00000101 LSB → Rn → T 1 LSB
ROTCL Rn 0100nnnn00100100 T ← Rn ← T 1 MSB
ROTCR Rn 0100nnnn00100101 T → Rn → T 1 LSB
SHAL Rn 0100nnnn00100000 T ← Rn ← 0 1 MSB
SHAR Rn 0100nnnn00100001 MSB → Rn → T 1 LSB
SHLL Rn 0100nnnn00000000 T ← Rn ← 0 1 MSB
SHLR Rn 0100nnnn00000001 0 → Rn → T 1 LSB
SHLL2 Rn 0100nnnn00001000 Rn<<2 → Rn 1 —
SHLR2 Rn 0100nnnn00001001 Rn>>2 → Rn 1 —
SHLL8 Rn 0100nnnn00011000 Rn<<8 → Rn 1 —
SHLR8 Rn 0100nnnn00011001 Rn>>8 → Rn 1 —
SHLL16 Rn 0100nnnn00101000 Rn<<16 → Rn 1 —
SHLR16 Rn 0100nnnn00101001 Rn>>16 → Rn 1 —