Datasheet
    Rev.5.00 Nov. 02, 2005 Page 497 of 500 
   REJ09B0027-0500 
Index 
Numerics 
14-bit PWM ............................................ 255 
Register settings.................................. 257 
Waveform output................................ 258 
A 
A/D converter ......................................... 337 
Sample-and-hold circuit...................... 344 
Scan mode........................................... 343 
Single mode ........................................ 343 
Address break ........................................... 63 
Addressing modes..................................... 33 
Absolute address................................... 34 
Immediate ............................................. 35 
Memory indirect ................................... 35 
Program-counter relative ...................... 35 
Register direct....................................... 33 
Register indirect.................................... 34 
Register indirect with displacement...... 34 
Register indirect with post-increment... 34 
Register indirect with pre-decrement.... 34 
C 
Clock pulse generators.............................. 69 
Prescaler S ............................................ 73 
Prescaler W........................................... 73 
Subclock generator ............................... 72 
System clock generator......................... 70 
Condition field.......................................... 32 
Condition-code register (CCR)................. 17 
CPU .......................................................... 11 
E 
EEPROM................................................ 349 
Acknowledge ...................................... 353 
Acknowledge polling .......................... 356 
Byte write............................................ 354 
Current address read ...........................356 
EEPROM interface ............................. 352 
Page write ...........................................355 
Random address read .......................... 357 
Sequential read.................................... 358 
Slave address reference register 
(ESAR)................................................ 353 
Slave addressing..................................353 
Start condition..................................... 352 
Stop condition ..................................... 353 
Effective address.......................................36 
Effective address extension....................... 32 
Exception handling ...................................47 
Reset exception handling ...................... 57 
Stack status ...........................................60 
Trap instruction..................................... 47 
F 
Flash memory ........................................... 89 
Boot mode............................................. 95 
Boot program ........................................ 95 
Erase/erase-verify ............................... 102 
Erasing units .........................................89 
Error protection................................... 105 
Hardware protection............................ 105 
Power-down states .............................. 106 
Program/program-verify ..................... 100 
Programmer mode............................... 106 
Programming units................................ 89 
Programming/erasing in user 
program mode ....................................... 98 
Software protection............................. 105 










