Datasheet
Section 1 Overview 
    Rev.5.00 Nov. 02, 2005 Page 1 of 500 
   REJ09B0027-0500 
Section 1 Overview 
1.1 Features 
•  High-speed H8/300H central processing unit with an internal 16-bit architecture 
  Upward-compatible with H8/300 CPU on an object level 
  Sixteen 16-bit general registers 
  62 basic instructions 
•  Various peripheral functions 
  RTC (can be used as a free running counter) 
  Timer B1 (8-bit timer) 
  Timer V (8-bit timer) 
  Timer Z (16-bit timer) 
  14-bit PWM 
  Watchdog timer 
  SCI (Asynchronous or clocked synchronous serial communication interface) × 2 channels 
  I
2
C Bus Interface (conforms to the I
2
C bus interface format that is advocated by Philips 
Electronics) 
  10-bit A/D converter 










