Datasheet

Section 13 Timer Z
Rev.5.00 Nov. 02, 2005 Page 230 of 500
REJ09B0027-0500
13.4.8 Buffer Operation
Buffer operation differs depending on whether GR has been designated for an input capture
register or an output compare register, or in reset synchronous PWM mode or complementary
PWM mode.
Table 13.8 shows the register combinations used in buffer operation.
Table 13.8 Register Combinations in Buffer Operation
General Register Buffer Register
GRA GRC
GRB GRD
1. When GR is an output compare register
When a compare match occurs, the value in the buffer register of the corresponding channel is
transferred to the general register.
This operation is illustrated in figure 13.35.
Buffer register Comparator TCNT
General
register
Compare match signal
Figure 13.35 Compare Match Buffer Operation
2. When GR is an input capture register
When an input capture occurs, the value in TCNT is transferred to the general register and the
value previously stored in the general register is transferred to the buffer register.
This operation is illustrated in figure 13.36.