Datasheet

Section 4 Address Break
Rev.4.00 Nov. 02, 2005 Page 62 of 304
REJ09B0143-0400
0142
0144
0146
*
MOV.B #H'23,R1H
MOV.B #H'45,R1H
MOV.B #H'67,R1H
0142 0144 0146 SP-2
SP-4
001C
0900
ABIF
[Register setting]
External interrupt Underlined indicates the address to be stacked.
ABRKCR=H'80
BAR=H'0144
001C 0900
: :
[Program]
MOV
instruction
prefetch
MOV
instruction
prefetch
MOV
instruction
prefetch
Stack save
Vector
fetch
Internal
processing
External interrupt
acceptance
Internal
processing
Address bus
External interrupt acceptance
Address break
interrupt request
Figure 4.4 Operation when Another Interrupt is Accepted at Address Break Setting
Instruction
When an address break is set to an instruction as a branch destination of a conditional branch
instruction, the instruction set when the condition of the branch instruction is not satisfied is not
executed, and an address break is generated. Therefore an address break must not be set to the
instruction as a branch destination of a conditional branch instruction.