Datasheet

Section 4 Address Break
ABK0001A_000020020300 Rev.4.00 Nov. 02, 2005 Page 55 of 304
REJ09B0143-0400
Section 4 Address Break
The address break simplifies on-board program debugging. It requests an address break interrupt
when the set break condition is satisfied. The interrupt request is not affected by the I bit of CCR.
Break conditions that can be set include instruction execution at a specific address and a
combination of access and data at a specific address. With the address break function, the
execution start point of a program containing a bug is detected and execution is branched to the
correcting program. Figure 4.1 shows a block diagram of the address break.
BARH BARL
BDRH BDRL
ABRKCR
ABRKSR
Internal address bus
Comparator
Interrupt
generation
control circuit
Internal data bus
Comparator
Interrupt
[Legend]
BARH, BARL: Break address register
BDRH, BDRL: Break data register
ABRKCR: Address break control register
ABRKSR: Address break status register
Figure 4.1 Block Diagram of Address Break
4.1 Register Descriptions
Address break has the following registers.
• Address break control register (ABRKCR)
• Address break status register (ABRKSR)
• Break address register (BARH, BARL)
• Break data register (BDRH, BDRL)