Datasheet

Section 2 CPU
Rev.4.00 Nov. 02, 2005 Page 24 of 304
REJ09B0143-0400
Table 2.8 System Control Instructions
Instruction Size* Function
TRAPA — Starts trap-instruction exception handling.
RTE — Returns from an exception-handling routine.
SLEEP — Causes a transition to a power-down state.
LDC B/W (EAs) → CCR
Moves the source operand contents to the CCR. The CCR size is one
byte, but in transfer from memory, data is read by word access.
STC B/W CCR → (EAd), EXR → (EAd)
Transfers the CCR contents to a destination location. The condition
code register size is one byte, but in transfer to memory, data is written
by word access.
ANDC B CCR ∧ #IMM → CCR, EXR ∧ #IMM → EXR
Logically ANDs the CCR with immediate data.
ORC B CCR ∨ #IMM → CCR, EXR ∨ #IMM → EXR
Logically ORs the CCR with immediate data.
XORC B CCR ⊕ #IMM → CCR, EXR ⊕ #IMM → EXR
Logically XORs the CCR with immediate data.
NOP — PC + 2 → PC
Only increments the program counter.
Note: * Refers to the operand size.
B: Byte
W: Word