Datasheet

Rev.4.00 Nov. 02, 2005 Page 299 of 304
REJ09B0143-0400
Item Page Revisions (See Manual for Details)
Section 8 RAM 93 Note has been added.
Bit Bit Name
Description
3
2
OS3
OS2
Output Select 3 and 2
These bits select an output method
for the TMOV pin by the compare
match of TCORB and TCNTV.
00: No change
01: 0 output
10: 1 output
11: Output toggles
Section 10 Timer V
10.3.4 Timer
Control/Status Register V
(TCSRV)
120
Bit Bit Name
Description
4 TCSRWE Timer Control/Status Register WD
Write Enable
:
Section 12 Watchdog
Timer
12.2.1 Timer
Control/Status Register
WD (TCSRWD)
160
Section 14 A/D Converter
14.3.1 A/D Data Registers
A to D (ADDRA to
ADDRD)
206 Therefore byte access to ADDR should be done by reading
the upper byte first then the lower one. Word access is also
possible. ADDR is initialized to H'0000.
Values
Item Symbol
Applicable
Pins Test Condition
Min
V
CC
= 4.0 V to 5.5 V V
CC
× 0.7 Input high
voltage
V
IH
PB3 to PB0
V
CC
× 0.8
V
CC
= 4.0 V to 5.5 V –0.3 Input low
voltage
V
IL
RXD,
P12 to P10,
P17 to P14,
P22 to P20,
P57 to P50,
P76 to P74,
P84 to P80
PB3 to PB0
–0.3
Section 17 Electrical
Characteristics
Table 17.2 DC
Characteristics (1)
230