Datasheet

Section 1 Overview
Rev.4.00 Nov. 02, 2005 Page 1 of 304
REJ09B0143-0400
Section 1 Overview
1.1 Features
• High-speed H8/300H central processing unit with an internal 16-bit architecture
 Upward-compatible with H8/300 CPU on an object level
 Sixteen 16-bit general registers
 62 basic instructions
• Various peripheral functions
 Timer V (8-bit timer)
 Timer W (16-bit timer)
 Watchdog timer
 SCI3 (Asynchronous or clocked synchronous serial communication interface)
 10-bit A/D converter
• On-chip memory
Product Classification Model ROM RAM
Flash memory version H8/3672 HD64F3672 16 kbytes 2,048 bytes
(F-ZTAT
TM
version) H8/3670 HD64F3670 8 kbytes 2,048 bytes
• General I/O ports
 I/O pins: 26 I/O pins, including 5 large current ports (I
OL
= 20 mA, @V
OL
= 1.5 V)
 Input-only pins: 4 input pins (also used for analog input)
• Supports various power-down modes
Note: F-ZTAT
TM
is a trademark of Renesas Technology Corp.
• Compact package
Package Code Body Size Pin Pitch
LQFP-64 FP-64E 10.0
× 10.0 mm 0.5 mm
LQFP-48 FP-48F 10.0 × 10.0 mm 0.65 mm
LQFP-48 FP-48B 7.0 × 7.0 mm 0.5 mm