Datasheet

Rev.4.00 Nov. 02, 2005 Page xviii of xxiv
Section 5 Clock Pulse Generators
Figure 5.1 Block Diagram of Clock Pulse Generators.................................................................. 65
Figure 5.2 Block Diagram of System Clock Generator................................................................ 65
Figure 5.3 Typical Connection to Crystal Resonator.................................................................... 66
Figure 5.4 Equivalent Circuit of Crystal Resonator...................................................................... 66
Figure 5.5 Typical Connection to Ceramic Resonator.................................................................. 66
Figure 5.6 Example of External Clock Input................................................................................ 67
Figure 5.7 Example of Incorrect Board Design ............................................................................ 68
Section 6 Power-Down Modes
Figure 6.1 Mode Transition Diagram ........................................................................................... 74
Section 7 ROM
Figure 7.1 Flash Memory Block Configuration............................................................................ 80
Figure 7.2 Programming/Erasing Flowchart Example in User Program Mode............................ 86
Figure 7.3 Program/Program-Verify Flowchart ........................................................................... 88
Figure 7.4 Erase/Erase-Verify Flowchart ..................................................................................... 91
Section 9 I/O Ports
Figure 9.1 Port 1 Pin Configuration.............................................................................................. 95
Figure 9.2 Port 2 Pin Configuration............................................................................................ 100
Figure 9.3 Port 5 Pin Configuration............................................................................................ 102
Figure 9.4 Port 7 Pin Configuration............................................................................................ 107
Figure 9.5 Port 8 Pin Configuration............................................................................................ 110
Figure 9.6 Port B Pin Configuration...........................................................................................113
Section 10 Timer V
Figure 10.1 Block Diagram of Timer V ..................................................................................... 116
Figure 10.2 Increment Timing with Internal Clock.................................................................... 123
Figure 10.3 Increment Timing with External Clock................................................................... 123
Figure 10.4 OVF Set Timing...................................................................................................... 123
Figure 10.5 CMFA and CMFB Set Timing ................................................................................ 124
Figure 10.6 TMOV Output Timing ............................................................................................ 124
Figure 10.7 Clear Timing by Compare Match............................................................................ 124
Figure 10.8 Clear Timing by TMRIV Input ............................................................................... 125
Figure 10.9 Pulse Output Example............................................................................................. 126
Figure 10.10 Example of Pulse Output Synchronized to TRGV Input....................................... 127
Figure 10.11 Contention between TCNTV Write and Clear ...................................................... 128
Figure 10.12 Contention between TCORA Write and Compare Match..................................... 129
Figure 10.13 Internal Clock Switching and TCNTV Operation................................................. 129
Section 11 Timer W
Figure 11.1 Timer W Block Diagram......................................................................................... 133