Datasheet

Section 11 Timer W
Rev.4.00 Nov. 02, 2005 Page 133 of 304
REJ09B0143-0400
Internal clock:
External clock: FTCI
FTIOA
FTIOB
FTIOC
FTIOD
IRRTW
Control logic
Clock
selector
Comparator
TCNT
Internal
data bus
Bus interface
[Legend]
TMRW: Timer mode register W (8 bits)
TCRW: Timer control register W (8 bits)
TIERW: Timer interrupt enable register W (8 bits)
TSRW: Timer status register W (8 bits)
TIOR: Timer I/O control register (8 bits)
TCNT: Timer counter (16 bits)
GRA: General register A (input capture/output compare register: 16 bits)
GRB: General register B (input capture/output compare register: 16 bits)
GRC: General register C (input capture/output compare register: 16 bits)
GRD: General register D (input capture/output compare register: 16 bits)
IRRTW: Timer W interrupt request
GRA GRB
GRC GRD
TMRW
TCRW
TIERW
TSRW
TIOR
φ
φ/2
φ/4
φ/8
Figure 11.1 Timer W Block Diagram