Datasheet

Rev.4.00 Nov. 02, 2005 Page xi of xxiv
6.2.3 Subsleep Mode........................................................................................................ 76
6.3 Operating Frequency in Active Mode.................................................................................. 77
6.4 Direct Transition.................................................................................................................. 77
6.5 Module Standby Function.................................................................................................... 77
Section 7 ROM ....................................................................................................79
7.1 Block Configuration.............................................................................................................79
7.2 Register Descriptions...........................................................................................................80
7.2.1 Flash Memory Control Register 1 (FLMCR1)........................................................ 81
7.2.2 Flash Memory Control Register 2 (FLMCR2)........................................................ 82
7.2.3 Erase Block Register 1 (EBR1) .............................................................................. 82
7.2.4 Flash Memory Enable Register (FENR)................................................................. 83
7.3 On-Board Programming Modes........................................................................................... 83
7.3.1 Boot Mode .............................................................................................................. 84
7.3.2 Programming/Erasing in User Program Mode........................................................ 86
7.4 Flash Memory Programming/Erasing.................................................................................. 87
7.4.1 Program/Program-Verify........................................................................................ 87
7.4.2 Erase/Erase-Verify.................................................................................................. 89
7.4.3 Interrupt Handling when Programming/Erasing Flash Memory............................. 90
7.5 Program/Erase Protection .................................................................................................... 92
7.5.1 Hardware Protection ............................................................................................... 92
7.5.2 Software Protection................................................................................................. 92
7.5.3 Error Protection....................................................................................................... 92
Section 8 RAM ....................................................................................................93
Section 9 I/O Ports...............................................................................................95
9.1 Port 1.................................................................................................................................... 95
9.1.1 Port Mode Register 1 (PMR1)................................................................................ 96
9.1.2 Port Control Register 1 (PCR1) .............................................................................. 97
9.1.3 Port Data Register 1 (PDR1)................................................................................... 97
9.1.4 Port Pull-Up Control Register 1 (PUCR1)..............................................................98
9.1.5 Pin Functions .......................................................................................................... 98
9.2 Port 2.................................................................................................................................. 100
9.2.1 Port Control Register 2 (PCR2) ............................................................................ 100
9.2.2 Port Data Register 2 (PDR2)................................................................................. 101
9.2.3 Pin Functions ........................................................................................................ 101
9.3 Port 5.................................................................................................................................. 102
9.3.1 Port Mode Register 5 (PMR5).............................................................................. 103
9.3.2 Port Control Register 5 (PCR5) ............................................................................ 104